The pattern detector allows DSP58 to support convergent rounding and counter auto reset when a count value has been reached. It also supports overflow, underflow, and saturation in accumulators. The following discussion of overflow and underflow applies to sequential accumulators (MACC or adder-accumulator) implemented in a single DSP58. The accumulator must have at least one guard bit.
The dedicated overflow and underflow outputs of DSP58 use the pattern
detector to determine if the operation in DSP58 has overflowed or underflowed beyond
the P[N] bit (N = 0 to 56). If the pattern detector is set to detect a 58-bit
00000 …0, with a 58-bit mask of
0011111 …1 (default settings), the DSP58 overflows
00111 …1 or underflows beyond
11000…0. In other words, DSP58 detects overflow past
the 57th bit P. The USE_PATTERN_DETECT attribute is set to PATDET to enable the
use of pattern logic. This overflow/underflow implementation uses a redundant sign
bit and reduces the output bit width to 57 bits.
The overflow and underflow flags remain High for only one cycle.
These values must be registered in the programmable logic if a saturation value is
used in the case of an overflow or underflow. The registered flags are used as
multiplexer select signals. The inputs of the multiplexer are tied to the maximum
positive value (
0011…1) or the maximum negative
1100..0). Depending on whether an overflow
or an underflow occurred, the appropriate input is selected at the output.
By setting the 58-bit mask to other values, for example,
0000111 …1, the bit value P(N) at which overflow is
detected can be changed. This logic supports overflow/underflow detection
respectively for a positive number of 2N – 1 and a
negative number of 2N in two's complement, where N is the
1s (0 to 56) in the mask field.
To detect overflow/underflow after P, the user needs to provide a guard bit stored in a flip-flop in programmable logic that has the same sign as P. If P is 1 and the guard bit is 0, there is overflow. If P is 0 and the guard bit is 1, there is underflow. Otherwise, the operation is normal.
See MACC Extension for additional information about MACC operations under overflow/underflow conditions.