W, X, Y, and Z Multiplexers

Versal ACAP DSP Engine Architecture Manual (AM004)

Document ID
AM004
Release Date
2022-09-11
Revision
1.2.1 English

The OPMODE control input contains fields for W, X, Y, and Z multiplexer selects.

The OPMODE input provides a way for you to dynamically change DSP58 functionality from clock cycle to clock cycle (for example, when altering the internal datapath configuration of DSP58 relative to a given calculation sequence). The OPMODE bits can be optionally registered using the OPMODEREG attribute.

The following tables list the possible values of OPMODE and the resulting function at the outputs of the four multiplexers (W, X, Y, and Z multiplexers). The multiplexer outputs supply four operands to the following adder/subtracter. Not all possible combinations for the multiplexer select bits are allowed. Some are marked in the tables as illegal selection and give undefined results. If the multiplier output is selected, then both the X and Y multiplexers are used to supply the multiplier partial products to the adder/subtracter.

Table 1. OPMODE Control Bits Select W Multiplexer Outputs
W OPMODE[8:7] Z OPMODE[6:4] Y OPMODE[3:2] X OPMODE[1:0] W Multiplexer Output Notes
00 xxx xx xx 0 Default. Must be selected for logic operations.
01 xxx xx xx P Requires PREG = 1
10 xxx xx xx RND -
11 xxx xx xx C -
Table 2. OPMODE Control Bits Select X Multiplexer Outputs
W OPMODE[8:7] Z OPMODE[6:4] Y OPMODE[3:2] X OPMODE[1:0] X Multiplexer Output Notes
xx xxx xx 00 0 Default
xx xxx 01 01 ±M

Must select with OPMODE[3:2] = 01

M is selected when NEGATE[0] = 0. –M is selected when NEGATE[0] = 1.

xx xxx xx 10 P Requires PREG = 1
xx xxx xx 11 A:B 58-bit wide
Table 3. OPMODE Control Bits Select Y Multiplexer Outputs
W OPMODE[8:7] Z OPMODE[6:4] Y OPMODE[3:2] X OPMODE[1:0] Y Multiplexer Output Notes
xx xxx 00 xx 0 Default
xx xxx 01 01 ±M

Must select with OPMODE[1:0] = 01

M is selected when NEGATE[0] = 0. –M is selected when NEGATE[0] = 1.

xx xxx 10 xx 58'FFFFFFFFFFFF Used mainly for logic unit bitwise operations on the X and Z multiplexers.
xx xxx 11 xx C
Table 4. OPMODE Control Bits Select Z Multiplexer Outputs
W OPMODE[8:7] Z OPMODE[6:4] Y OPMODE[3:2] X OPMODE[1:0] Z Multiplexer Output Notes
xx 000 xx xx 0 Default
xx 001 xx xx PCIN -
xx 010 xx xx P Requires PREG = 1
xx 011 xx xx C -
00 100 10 00 P Use for MACC extend only. Requires PREG = 1
xx 101 xx xx 17- or 23-bit Shift (PCIN) Arithmetic right shift by 17 bits only if DSP_MODE is DSP48E2.
xx 110 xx xx 17- or 23-bit Shift (P) PREG = 1. Arithmetic right shift by 17 bits only if DSP_MODE is DSP48E2.
xx 111 xx xx xx Illegal selection.