Every configurable logic block (CLB) contains four slices totaling 32 6-input look-up tables (LUTs) and 64 slice storage elements. The LUTs in the CLB are grouped in groups of eight. Unlike previous generations, there is only one CLB type. Groups of four SLICEM LUTs are supported. Four logic LUTs and either four LUTRAMs or four SRLs can be placed in a SLICEM. Each CLB contains exactly 50% LUTRAM/SRL capable LUTs. There is a carry block next to each group of eight LUTs that can be used together with the LUTs to implement various arithmetic functions. Multiplexers and slice flip-flops are located next to the carry block. This allows the outputs of the LUTs and the carry logic to interface with the interconnect block directly, or through programmable flip-flops.
The CLBs are arranged in columns. The local interconnect and super long line (SLL) connections, located in the middle of the CLB, provide additional CLB interfaces. An interconnect block is located on the left and right side of each CLB column. The left and right halves of the CLB are identical. Therefore, many of the descriptions in this architecture manual only focus on one half of the CLB.