IMUX Register

Versal ACAP Configurable Logic Block Architecture Manual (AM005)

Document ID
AM005
Release Date
2023-02-28
Revision
1.2 English

Input multiplexer (IMUX) registers are embedded into the CLB. IMUX registers exist on the following CLB inputs: 192 IMUXs and 64 bypasses. The IMUX registers are located near the interconnect/CLB boundary and can be bypassed.

The IMUX registers support a subset of CLB flip-flop features. Each IMUX register has a clock enable and synchronous or asynchronous reset capabilities. They have no readback/writeback, and no sync /async set capability. Initialization is programmable but the options are either init=0 or init=data input (no init=1). The init=data input is necessary when using IMUX registers as hold-time fixing elements.

Some restrictions apply for IMUX registers. IMUX registers are supported in mid (M) voltage or high (H) voltage and extended (E) temperature or industrial (I) temperature devices. IMUX registers are not supported in VC1902, VC1802, VC1702, VC1502, VE1752, VM1802, VM1502, VM1402, and VM1302 devices.