Analog Channels

Versal ACAP System Monitor Architecture Manual (AM006)

Document ID
AM006
Release Date
2022-05-17
Revision
1.3 English

To monitor the system's operating environment, the System Monitor (SYSMON) is equipped with supply sensors, temperature sensor, and external inputs that connect the ADC off-chip. All ADC readings are stored in the SYSMON memory-mapped registers that is defined by the Control, Interface, and Processing (CIPS) IP in Vivado® tools. Because the quantity and type of sensors available in a device vary by device, the CIPS IP is device-aware and equipped to enable specific sensors. The CIPS IP automatically maps the selected voltage sensor to the SYSMON registers by assigning a SUPPLY number (referred to generically as XX in this manual) to a given channel number. The supply number is maintained across all references to a supply. In Xilinx Versal® ACAPs, with monitoring the maximum number of channels (160), readings can still be provided at a rate of at least 8 kSPS. For a list of SYSMON registers and their function, see Versal ACAP Register Reference (AM012).

Analog Voltage format

All registers holding voltages, including measurements and thresholds, are represented in a 19-bit modified floating-point format, directly reading in units of Volts. The sample data is stored in the least significant 19 bits of a 32-bit sample register. The sixteen least significant bits represent the mantissa of the sample in either a signed or unsigned format. The format bit (bit 16) defines whether the mantissa is signed (1) or unsigned (0). Bits 17 and 18 define the scaling of the mantissa. See the following figure.

Figure 1. General Voltage Format