Configuring the SYSMON

Versal Adaptive SoC System Monitor Architecture Manual (AM006)

Document ID
AM006
Release Date
2023-12-13
Revision
1.4 English

To provide a comprehensive system monitoring solution in the Versal devices architecture, configuring the SYSMON needs device specific knowledge and a non-dedicated channel configuration. With this in mind, it is required that the control, interface, and processing system (CIPS) IP in Vivado tools are used to enable and configure the SYSMON. The CIPS IP provides a GUI interface to set alarms, enable averaging, and enable I2C/PMBus access.

The CIPS IP wizard provides many functions to configure Versal devices designs, but access for the SYMON configuration if found under the "device integrity options" section of the user interface. The SYSMON configuration portion of the CIPS wizard is broken down into the following tabs.

  • Basic Configuration
  • On-Chip Supply Monitor
  • Temperature
  • External Supply Monitor

The basic configuration tab allows the user to define averaging levels, to define the source of the reference, as well as enabling external interface options. The on-chip supply monitor tab is where the sensors that monitor supply voltages and dedicated VP/VN assignments are located. For each sensor that is enabled, averaging can be enabled, and alarms can be configured. The temperature tab allows for temperature based alarm configuration. The external supply monitor tab allows for the enabling and pin assignment for the auxiliary input (AUXIO) pins. In this section, specific AUXIO pins can be assigned to package sites.

The CIPS wizard takes these user options and assigns the various enabled voltage channels to a supply number which can be assigned and identified in the CIPS configuration flow. Details on the CIPS IP be found in the Control, Interface and Processing System LogiCORE IP Product Guide (PG352).

Important: All channels that may need to be monitored are enabled in the CIPS wizard. Unlike previous architectures, debug tools, such as HW_Manager, only have access to channels configured in CIPS. There is no timing/sampling penalty for enabling many channels.

After the channels are defined by the CIPS wizard, the PMC register map can be used to modify attributes on the defined channels. Attributes such as averaging levels and alarm thresholds can be modified through the register map in the PMC_SYSMON_CSR module. See the Versal Adaptive SoC Register Reference (AM012) for SYSMON register descriptions. Software drivers are provided as part of the AMD Vitis™ unified software platform to simplify software access to the SYSMON. Driver details can be found here.