I2C_Read and I2C_Write

Versal Adaptive SoC System Monitor Architecture Manual (AM006)

Document ID
AM006
Release Date
2023-12-13
Revision
1.4 English
Figure 1. I2C Write Instruction Example

Figure 2. I2C Read Instruction Example

Table 1. Command Description
Command Description
SM or SrM Start or repeated start (there is no stop before repeated start) - master to slave
AM[6:0] 7-bit slave address – master to slave
ACKS 0, acknowledgment – slave to master
ACKM 0, acknowledgment – master to slave
NACKM 1, not acknowledgment – master to slave
DM See the previous figure for 56-bit I2C command format sent 8 bits at a time
DS 32-bit command response sent 8 bits at a time
PM Stop – master to slave