Over and Under Voltages

Versal ACAP System Monitor Architecture Manual (AM006)

Document ID
AM006
Release Date
2022-05-17
Revision
1.3 English

The input voltage can exceed VCCAUX_SMON (1.5V) or go below GND_SMON by as much as 100 mV without damage to the SYSMON. A current-limiting resistor of at least 100Ω must be placed in series with the analog inputs to limit the current to 1 mA. The resistors in the anti-alias filters fulfill this requirement. If the analog input range (1V) is exceeded, the ADC output code clips at the maximum output code.