The following table shows a comparison of the block RAM and UltraRAM main features.
| Feature | Block RAM | UltraRAM |
|---|---|---|
| Clocking | Two clocks | Single clock |
| Data width | Configurable (9, 18, 36, 72) | Configurable 9, 18, 36, 72 |
| Modes | SDP and TDP | Two ports, each can independently read or write (a superset of SDP) |
| ECC | 64-bit SECDED Supported in 64-bit SDP only (one ECC decoder for port A and one ECC encoder for port B) |
64-bit SECDED One set of complete ECC logic for each port to enable independent ECC operations (ECC encoder and decoder for both ports) |
| Cascade | Cascade output only (input cascade implemented via logic resources) Cascade within a single clock region |
Cascade both input and output (with global address decoding) Cascade across clock regions in a column Cascade across several columns with minimal logic resources |
| Power savings | One mode via manual signal assertion | One mode via manual signal assertion |