Byte Write Enable Function

Versal ACAP Memory Resources Architecture Manual (AM007)

Document ID
AM007
Release Date
2020-11-24
Revision
1.1 English

The byte write enable feature allows a single byte of the input data to be written to the SRAM array. There are nine bits of write enable inputs for each port A and port B. There are two modes of operation that are selected by the BWE_MODE_[A/B] attribute. In PARITY_INTERLEAVED mode, each write enable bit enables eight data bits plus one parity bit. So each byte has a corresponding single parity bit. In the PARITY_INDEPENDENT mode, each write enable bit (BWE[7:0] enables the writing of eight data bits (one byte). The BWE bit number nine (BWE[8]) enable bit controls the one byte of eight parity bits. The byte write inputs are ignored during a read operation.

Note: If the ECC feature is used, all byte write enable bits must be set to "1" for proper operation of the ECC encoder/decoder.