Data-In Buses – DINADIN, DINPADINP, DINBDIN, and DINPBDINP

Versal ACAP Memory Resources Architecture Manual (AM007)

Document ID
AM007
Release Date
2020-11-24
Revision
1.1 English

Data-in buses provide the new data value to be written into RAM. The regular data-in bus (DIN) plus the data-in parity bus (DINP), when available, have a total width equal to the port width. For example, the 36-bit port data width is represented by DIN[31:0] and DINP[3:0], as shown in Table 1 through Table 4. See Table 5 for port name mapping for block RAMs used as SDP memories.