External CE Usage – USE_EXT_CE_[A|B]

Versal ACAP Memory Resources Architecture Manual (AM007)

Document ID
AM007
Release Date
2020-11-24
Revision
1.1 English

This attribute enables the use of external CE inputs to control all the output pipeline stages in non-cascade mode. By default, the design uses the internally generated CEs to control all the pipeline stages. This does not apply to the OREG_CAS registers enables. In cascade mode, the OREG_CAS register enables are automatically controlled by the UltraRAM. Using the RDACCESS output signal is not allowed when external CE mode is enabled.

Note: In cascade mode, USE_EXT_CE cannot be used and should be set to false. Consequently, in cascade mode, the external CE inputs (OREG_CE and OREG_ECC_CE) cannot be used. This attribute is only supported when CASCADE_ORDER=NONE.