The SRVAL (single-port) or SRVAL_A and SRVAL_B (dual-port) attributes define output latch values
when the RSTRAM/RSTREG input is asserted. The width of the SRVAL (SRVAL_A and SRVAL_B)
attribute is the port width, as shown in the table. These attributes are hex-encoded bit
vectors and the default value is 0. This attribute sets the value of the output register
when the optional output register attribute is set. When the register is not used, the
latch gets set to the SRVAL instead. The following tables show how the SRVAL and INIT
bit locations map to the DOUT outputs for the block RAM primitives and the SDP
macro.
Table 1. RAMB18E5 and RAMB36E5, SRVAL Mapping for Port A and Port B
| Port
Width |
SRVAL_(A/B)
Full Width |
SRVAL_(A/B)
Mapping to DOUT |
SRVAL_(A/B)
Mapping to DOUTP |
| DOUTADOUT/ DOUTBDOUT |
SRVAL_(A/B) |
DOUTP(A/B)/ DOUTP |
SRVAL_(A/B) |
| 9 |
[8:0] |
[7:0] |
[7:0] |
[0] |
[8] |
| 18 |
[17:0] |
[15:0] |
[15:0] |
[1:0] |
[17:16] |
| 36 (only for RAMB36E5) |
[35:0] |
[31:0] |
[31:0] |
[3:0] |
[35:32] |
Table 2. SDP Mapping for RAMB18E5 and RAMB36E5
| Port
Width |
SRVAL Full
Width |
SRVAL Mapping
to DOUT |
SRVAL Mapping
to DOUTP |
| DOUT |
SRVAL |
DOUTP |
SRVAL |
| 36-bit wide RAMB18E5 |
[35:0] |
[31:0] |
[33:18]/[15:0] |
[3:0] |
[35:34]/[17:16] |
| 72-bit wide RAMB36E5 |
[71:0] |
[63:0] |
[67:36]/[31:0] |
[7:0] |
[71:68]/[35:32] |