This attribute determines if the SLEEP pin is to be used in synchronous or asynchronous mode. Synchronous mode (SLEEP_ASYNC = FALSE) should be used when either both clocks are identical or have a fixed phase relationship. In this mode, ENA and ENB must be deasserted (disabled) in the clock cycle prior to asserting SLEEP. The assertion and deassertion of SLEEP must meet the setup and hold times with respect to both CLKA and CLKB. ENA and ENB must only be asserted again after the block RAM returns from its sleep mode after two clock cycles.
Asynchronous mode (SLEEP_ASYNC = TRUE) should be used when both clocks are truly independent (asynchronous to each other). In this mode, ENA and ENB must be deasserted (disabled) in the clock cycle for the slowest clock prior to asserting SLEEP. SLEEP can then be asserted with the next clock cycle of the same clock. The deassertion of SLEEP causes the block RAM to activate (wake up) up after two clock cycles. Only after the memory wakeup can ENA and ENB be asserted again.