An UltraRAM RST operation simultaneously resets the read data/status/ECC error outputs and all corresponding optional output/cascade pipeline registers. The reset function can be synchronous (the default) or asynchronous depending on the RST_MODE attribute setting. The reset operation has priority over any read operation and any of the CE inputs. After deasserting RST, the reset value is valid until a new read data value flows through the pipeline.
When in asynchronous reset mode, the UltraRAM does not have any built-in synchronizers on this input for deassertion. Therefore, a logic-based synchronizer might be required for the RST input.
Note: If the design utilizes cascade, then a common synchronizer should
be used for all the UltraRAM RSTs in the chain.