UltraRAM is a single-clocked, two port, synchronous memory available in Versal devices. Because UltraRAM is compatible with the columnar architecture, multiple UltraRAMs can be instantiated and directly cascaded in an UltraRAM column for the entire height of the device. A column in a single clock region typically contains 24 UltraRAM blocks. Devices with UltraRAM include multiple UltraRAM columns distributed in the device. Most of the devices in the Versal architecture include UltraRAM blocks. For the available quantity of UltraRAM in specific devices, see Versal Architecture and Product Data Sheet: Overview (DS950).
Note: In some devices, the number of
UltraRAM in the topmost or bottommost clock region
might be reduced by one to accommodate a boundary
logic interface to other blocks. For a sample
description of a boundary logic interface, see
Versal ACAP SelectIO Resources Architecture Manual (AM010).