AI Engine to PL Data Communication via Shared Memory

Versal Adaptive SoC AI Engine Architecture Manual (AM009)

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1.3 English

In the generic case, the PL block consumes data via the stream interface. It then generates a data stream and forwards it to the array interface, where inside there is a FIFO that receives the PL stream and converts it into an AI Engine stream. The AI Engine stream is then routed to the AI Engine destination function. Depending on whether the communication is block-based or stream-based, DMA and ping-pong buffers could be involved.

The following figure shows an example (use case) between the common public radio interface (CPRI™) and the JESD® in the PL. The AI Engine and PL can communicate using DMA in the AI Engine tile. The DMA moves the stream into a memory block neighboring the consuming AI Engine. The first diagram represents the logical view and the second diagram represents the physical view.

Figure 1. AI Engine to PL Data Communication via Shared Memory