Array Interface AXI4-Stream Interconnect

Versal Adaptive SoC AI Engine Architecture Manual (AM009)

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1.3 English

The main task of the AI Engine AXI4-Stream switch is to carry deterministic throughput and high-speed circuit or packet data-flow between AI Engines and the programmable logic or NoC. Therefore, it is designed to carry the bulk of the data movement to/from the AI Engine array. The AXI4-Stream switches in the bottom row of AI Engine tiles interface directly to another row of AXI4-Stream interconnected switches in the AI Engine array interface.