Register Move Functionality

Versal Adaptive SoC AI Engine Architecture Manual (AM009)

Document ID
AM009
Release Date
2023-08-18
Revision
1.3 English

The register move capabilities of the AI Engine are covered in this section (refer to the Register Files section for a description of the naming of register types.

  • Scalar to scalar:
    • Move scalar values between R, M, P, C, and special registers
    • Move immediate values to R, M, P, C, and special registers
    • Move a scalar value to/from an AXI4-Stream
  • Vector to vector: Move one 128-bit V-register to an arbitrary V-register in one cycle. It also applies to the 256-bit W-register and the 512-bit X-register. However, vector sizes must be the same in all cases.
  • Accumulator to accumulator: Move one 384-bit accumulator (AM) register to another AM-register in one cycle
  • Vector to accumulator; there are two possibilities:
    • Upshift path takes 16 or 32-bit vector values and writes into an accumulator
    • Use the normal multiplication datapath and multiply each value by a constant value of 1
  • Accumulator to vector: Shift-round saturate datapath moves the accumulator to a vector register
  • Accumulator to cascade stream and cascade to accumulator: Cascade stream connects the AI Engines in the array in a chain and allows the AI Engines to transfer an accumulator register (384-bit) from one to the next. A small two-deep 384-bit wide FIFO on both the input and output streams allows storing up to four values in the FIFOs between the AI Engines.
  • Scalar to vector: Moves a scalar value from an R-register to a vector register
  • Vector to scalar: Extracts an arbitrary 8-bit, 16-bit, or 32-bit value from a 128-bit or 256-bit vector register and writes results into a scalar R-register