Additional Features

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
Release Date
1.6 English

The following features provide additional safety support:

  • DDR interface supports ECC for 32-bit and 64-bit words
    • Double-error detection
    • Single-error correction
  • ECC in APU L2-cache
  • ECC in L1 data cache memory
  • Parity in L1 instruction cache memory
  • QOS management
    • QOS controls on transaction host
    • QOS management in PS AXI
    • QOS management in DDR memory controller
  • Leverage of PL for implementation of safety features
    • Provides HFT channel capability
    • Provides error logging
    • PL can remain active if PS is reset due to an error