Aperture Register Map

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The bit for that profile is set in the [PERMISSION] bit field. For example, if the transaction satisfies the SMID and read/write permissions of the SMID_00 register and bit 0 of the [PERMISSION] bit field = 1, then the transaction might proceed pending other checks.

The following table shows the four sets of apertures and the address protected for each aperture.

Table 1. XPPU Aperture List
Aperture Size Number of Apertures Base Address of Aperture Registers
LPD_XPPU PMC_XPPU PMC_NPI_XPPU
64 KB

0x0001_0000

256

0xFF00_0000

0xF100_0000 0xF600_0000
1 MB

0x0010_0000

16

0xFE00_0000

0xF000_0000 0xF700_0000
512 MB

0x2000_0000

1 0xE000_0000 0xC000_0000 Not supported