CPU Pipeline

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

The CPU pipeline includes:

  • Variable length, super-scalar pipeline (up to 15 stages) with out-of-order execution
  • Arm Arch64 v8A CPU architecture
  • Arm Arch32 capable for legacy applications
  • Dynamic branch prediction with branch target buffer and global history buffer, a return stack, and an indirect predictor