ClkMon Registers

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The ClkMon registers are shown in the following table.

Table 1. ClkMon Unit Register Summary
Register Name Number of Registers Access Type Description


            CLKMON_ISR
        


            CLKMON_IMR
        


            CLKMON_IER
        


            CLKMON_IDR
        

4

W1C
R
W
W

ClkMon interrupt registers for out of range and internal counter overflow
CLKMON0_THRESH_U (0 to 7) 8 RW Upper threshold count
CLKMON0_THRESH_L (0 to 7) 8 RW Lower threshold count
CLKMON0_BASE (0 to 7) 8 RW Number of base reference clocks in base time period
CLKMON0_CTRL (0 to 7) 8 RW Select reference and monitor clocks, start sample, status idle state