Comparison to Previous Generation Xilinx Devices

Versal ACAP Technical Reference Manual (AM011)

Document ID
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1.5 English

The Versal® device PMC reset structure is expanded to include more device-level controls with features to support new packaging technologies.

The Versal ACAP has just one dedicated reset pin, POR_B. This pin asserts the external power-on reset, External_POR. The Versal device does not include the Zynq® UltraScale+™ MPSoC PS_SRST_B reset pin.

The programming model includes device-level system resets for the reset controllers that are similar to the Zynq UltraScale+ MPSoC.