Configuration Frame Unit

The configuration frame unit (CFU) translates AXI traffic into the CFI bus protocol, performs data integrity checks, and manages the CFI traffic. The CFU also performs several functions including frame write rate matching, frame read rate matching, frame read/write transition, row switching, decompression, and putting the configuration frame interface (CFI) into idle.

The CFU is the only control for the CFI bus. The input CFU reference clock runs at the same rate as the output CFI clock frequency. The CFU AXI interfaces support 32-bit, 64-bit, or 128-bit transactions. The CFU AXI must 128-bit align the 32-bit and 64-bit transactions. The CFU cannot support streams of data from multiple transaction hosts at the same time. A single host can control both CFU AXI write and read to perform CFI readback.

The programmable device image (PDI) created with the Vitis™ tool contains PL partition data that the CFU manages. The CFU handles the transfer of configuration data through the CFI to the configuration frames in the PL. The CFU ensures that the configuration frames are ready to accept the CFI bus transactions sent to them. The CFU checks the packet data to determine if the packet rate sent needs to be slower and throttles the AXI interface as necessary. The CFU also performs data decompression on the PL_CFI partition included in the .RCDO. PDI compression is set by default in the Versal® device. For more information on changing the compression option, see Vivado Design Suite User Guide: Programming and Debugging (UG908).

The CFU includes a programming interface to the CFRAMExx_REG register modules. These are used to configure the functionality, poll status, and generate PL global signal sequences. The CFU provides several configuration frame data-in ports (CFRAMExx_FDRI) and a configuration frame data-out port (CFU_FDRO).

CFU Address Map

The PL configuration address space includes the following.

• Register modules
  • CFU_APB (aka CFU_CSR) at 0xF12B_0000
  • CFRAMExx_REG control and status registers (see following table)
• Data ports
  • CFU_STREAM at 0xF12C_0000, 4 KB
  • CFU_SFR at 0xF12C_1000, 4 KB
  • CFU_FDRO data-out port at 0xF12C_2000, 4 KB
  • CFRAMExx_FDRI data-in ports, 4 KB each (see following table)