Configuration Mode

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The configuration mode is normally entered following reset, but can also be entered from several other modes including normal, snoop, sleep, and loopback. If the controller needs to move from the BSFR or PEE state, a system reset is required.

Configuration Mode Characteristics

The CAN FD has the following configuration mode characteristics:

  • Controller loses synchronization with the CAN bus and drives a constant recessive bit on TX line.
  • Error Counter register ( Error_Count ) and Error Status register ( Error_Status ) are reset.
  • ArbPhase_BitTiming ) and ArbPhase_BaudRate registers can be modified.
  • Set the APB_MISC_ISR [CONFIG] bit = 1.
  • Controller does not receive or transmit any new messages.
  • All configuration registers are accessible.
  • If there are messages pending for transmission when the SW_Reset [CEN] bit is written 0, the controller does not transmit any messages and:
    • TX messages are preserved unless canceled; message cancellation is allowed.
    • TX messages are transmitted when normal operation is resumed.
    • New TX messages can be added for transmission (provided the Mode_Select [SNOOP] is not set = 1).
  • If there are RX messages in the RX buffer when [CEN] is set = 0, they are preserved until host reads them, but the controller does not receive new messages.

Interrupts

In configuration mode, the interrupt status might change.

  • Interrupt Status register bits are cleared:
    • ARBLST
    • TXOK and RXOK
    • RXOFLW, RXOFLW_1
    • ERROR
    • BSOFF
    • SLP and WKUP
  • Interrupt Status register bits are not cleared due to possible cancellation using:
    • TXTRS and TXCRS
Note: A system interrupt is generated if an interrupt bit is set = 1 in the APB_MISC_ISR register and the corresponding bit in the APB_MISC_IER register = 1.

Exit Configuration Mode

The controller stays in configuration mode until the SW_Reset [CEN] bit is set = 1.

  • After the [CEN] bit is set to 1, the controller waits for a sequence of 11 nominal recessive bits before exiting configuration mode.
  • Move the controller to normal, snoop, sleep, or loopback mode by setting one of the Mode_Select [SNOOP], [SLEEP], and [LBACK] register bits.