The RPU_DUAL_CSR register set includes several control and configuration registers for the RPU. These registers are read/write.
Register | Bit Field and Description | Reset Value and Description |
---|---|---|
GLOBAL_CNTL |
[CFGEE, 0]: endian mode during exception handling |
0: little endian |
[nCPUHALT, 0]: State after reset released |
1: processor runs (not halted) |