Device Identification

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English
The AMD Versalâ„¢ adaptive SoC has multiple device identification methods:
  • Top package marking
  • IDCODE + EXTENDED_IDCODE register value (see the Versal adaptive SoC data sheets listed in References)
  • Device DNA register value

Security features such as PUF can also be used to create a unique identifier. For more information on using PUF, see Security Management.

Package Marking

The Versal devices have a top package marking that includes the device family name and a 2D bar code for device-level tracking. The 2D bar code information can be accessed several ways including with the AMD web-based tool or the AMD GO mobile application. For more information, see the Versal Adaptive SoC Packaging and Pinouts Architecture Manual (AM013).

ID Code Introduction

The Versal device has a 32-bit identification stored in the IDCODE register. The IDCODE is a fixed, vendor-assigned value used to electrically identify the manufacturer. The IDCODE used with the EXTENDED_IDCODE can also identify the type of AMD device.

The IDCODE register can be read via the JTAG interface or from the AXI interface using the IDCODE register address. When the IDCODE instruction is selected by the JTAG TAP, the IDCODE register is connected between the JTAG TDI and TDO pins, and the value can be shifted out through TDO for examination with tools such as the Vivado design suite. The least significant bit of the IDCODE register is always 1 (based on the JTAG IEEE Std 1149.1).

Table 1. IDCODE Register
Register Type Register Name Address Description
Read only PMC_JTAG_CSR IDCODE [31:0] 0xF11A_0000 ID code; also see the IDCODE Register section for bit field details
Note: The power-on reset (POR_B) pin must be released and REF_CLK running before reading the IDCODE registers.

Extended ID Code Introduction

The Versal device has a 32-bit device extended family code that is stored in the EXTENDED_IDCODE register. The EXTENDED_IDCODE vendor-assigned value is used with the ID code to identify a unique AMD device.

The extended ID value can be read via the JTAG interface or from the AXI interface. When the EXTENDED_IDCODE instruction is selected by the JTAG TAP, the EXTENDED_IDCODE register is connected between the JTAG TDI and TDO pins, and the value can be shifted out through TDO for examination with tools such as the Vivado design suite.

Note: The ID codes for each device are listed in the applicable data sheet.

Software can access the extended ID code by reading the PMC_EFUSE_CACHE EXTENDED_IDCODE register.

Table 2. EXTENDED_IDCODE Code Register
Register Type Register Name Address Description
Read only PMC_EFUSE_CACHE EXTENDED_IDCODE bits [27:14] 0xF125_0018 Extended device ID code; also see the EXTENDED_IDCODE Register section

DNA Introduction

The device DNA is a single unique 128-bit factory-programmed identifier for each device. The JTAG TAP instruction, READ_DNA, reads the DNA value through the JTAG interface. The device DNA value can also be read from the AXI interface using the combined value from the DNA_0, DNA_1, DNA_2, and DNA_3 registers.

Table 3. DNA Registers
Register Type Register Name Address (Hex) Description
128 bit JTAG, read only DNA - Access DNA[127:0] using the READ_DNA instruction; also see DNA Register section for bit field details
32-bit memory mapped, read only DNA_0 0xF125_0020 DNA 0 register contains DNA bits[31:0]
DNA_1 0xF125_0024 DNA 1 register contains DNA bits[63:32]
DNA_2 0xF125_0028 DNA 2 register contains DNA bits[95:64]
DNA_3 0xF125_002C DNA 3 register contains DNA bits[127:96]