GIC Registers

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The GIC-500 register modules are accessible only to the APU with one exception. The APU_GIC_ITS_TRANS register module is a single-register module that is accessible only to the CPM/PCIe to generate a message signal interrupt (MSI) request.

Table 1. APU GIC Local Register Modules
Register Modules Base Address Description
APU_GIC_DIST_MAIN 0xF900_0000 Main interrupt distributor
APU_GIC_DIST_MBSPI 0xF901_0000 SPI interrupt distributor
APU_GIC_ITS_CTL 0xF902_0000 ITS service control
APU_GIC_ITS_TRANS 0xF903_0000 ITS service (MSI request); accessible by CPM/PCIe only.
APU_GIC_A72_CPUIF 0xF904_0000 CPU interface
APU_GIC_A72_VIFCTL 0xF905_0000 CPU Virtual Interface Control
APU_GIC_A72_VCPUIF 0xF906_0000 CPU Virtual Interface


            APU_GIC_REDIST_CTLLPI
        
_0

            APU_GIC_REDIST_CTLLPI
        
_1

0xF908_0000
0xF90A_0000

Redistributor registers for control and physical LPI interrupts:
APU0 and APU1


            APU_GIC_REDIST_SGISPI
        
_0

            APU_GIC_REDIST_SGISPI
        
_1

0xF909_0000
0xF90B_0000

Redistributor registers for SGI and PPI interrupts:
APU0 and APU1