GPIO I/O Signals

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

There are two types of GPIO banks:

  • MIO pins
  • PL EMIO port signals

Each I/O pin can be individually programmed. For example, the PMC MIO pin 0 is controlled by the PMC MIO_PIN_0 register.

Each GPIO channel consists of data in, data out, and 3-state output control. For MIO, these signals control the I/O buffer on the pin pad. For PL EMIO, all three signals connect between the GPIO controller and the PL. The I/O buffer parameters are programmed on a per bank basis.

The LPD GPIO controller attaches to the LPD MIO.

Table 1. GPIO MIO Signals
MIO Pin Signals
GPIO Bank Signal Name I/O PMC MUX Pin PS MUX Pin MIO-at-a-Glance
PMC Bank 0 PMC_GPIO[0:25] I/O 0:25 ~ 0:25
PMC Bank 1 PMC_GPIO[26:51] I/O 26:51 ~ 26:51
LPD Bank 0 LPD_GPIO[0:25] I/O ~ 0:25 0:25
Table 2. GPIO PL EMIO Signals
EMIO Port Signals
GPIO Bank Signal Name I/O
PMC Bank 3 [0:31] Input_x I
Output_x O
Output_En_x O
PMC Bank 4 [0:31] Input_x I
Output_x O
Output_En_x O
LPD Bank 3 [0:31] Input_x I
Output_x O
Output_En_x O