Glitch Filter Note

Versal ACAP Technical Reference Manual (AM011)

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1.5 English

For I2C mode, the glitch filter duration must not exceed 50 ns. The filter is controlled by the PMC_I3C.Glitch_Filter_reg register and clocked by the PMC_LSBUS clock. For a 150 MHz LSBUS clock frequency, the Glitch_Filter register should be set to a value of 5 to provide a 33.3 ns filter duration.