The hardware flow control feature is fully selectable. This feature enables the control of the serial data flow by using the UARTX_CTS_b output and UARTX_RTS_b input signals.
The following figure shows communication between two devices using the hardware flow control.
When the RTS flow control is enabled, UARTX_RTS_b is asserted until the receive FIFO is filled up to the programmed watermark level. When the CTS flow control is enabled, the transmitter can only transmit data when UARTX_CTS_b is asserted.
The hardware flow control is selectable using the [RTSEn] and [CTSEn] bits in the Control register, UART CTRL . The following table lists the bit settings used to enable RTS and CTS flow control both simultaneously and independently.
|1||1||Both RTS and CTS flow control enabled|
|1||0||Only CTS flow control enabled|
|0||1||Only RTS flow control enabled|
|0||0||Both RTS and CTS flow control disabled|