High-Bandwidth Memory Interface

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

The high-bandwidth memory (HBM) interfaces are a device option included in some of the Xilinx stacked silicon interconnect (SSI) technology devices. The HBM DRAM memory die are from third-party vendors and are integrated into the Xilinx device using a silicon interposer for connections to the HBM interfaces on the Xilinx die. The memory stacks can be one, two, four, or eight dies high plus a base DRAM controller die.