The following table lists the I/O peripheral clock frequency requirements and links to the clock section of the various controller chapters.
|Peripheral and Mode||Description|
|CAN FD see CAN FD Clocks|
|All Modes||CAN_REF_CLK frequency must be less than the LPD_LSBUS_CLK|
|Set to 160 MHz ±0.25% to satisfy the CAN FD spec|
|GEM Ethernet, see GEM Clocks|
|GEM_TX||Set to 125 MHz ±100ppm. This is governed by the 802.3 Ethernet specification and might limit the maximum operational frequency of the PLL selected.|
|SPI Controller, see SPI Clocks section|
|Master Mode||SPIx_REF_CLK >= 4 * LPD_LSBUS_CLK|
|Slave Mode||SPIx_REF_CLK >= 2 * LPD_LSBUS_CLK|
|UART Controller, see UART Clocks section|
There is a restricting shown in the Baud Rate Divider section.