I/O Signal Table

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

The I/O signals are shown in MIO-at-a-Glance and detailed in the following table.

Two devices can be attached to the I/O interface. The OSPI_CS0_b and OSPI_CS1_b are used for the stacked device configuration. For non-stacked configurations, use OSPI_CS0_b.

Table 1. OSPI Controller I/O Signals
MIO Description
Signal Name I/O PMC MIO Pin MIO-at-a-Glance Table
OSPI_CLK Output 0 0 Clock output

OSPI_IO[0]
OSPI_IO[1]
OSPI_IO[2]
OSPI_IO[3]
OSPI_IO[4]

I/O

1
2
3
4
5

1
2
3
4
5

I/O signals
OSPI_DS Input 6 6 Read data strobe

OSPI_IO[5]
OSPI_IO[6]
OSPI_IO[7]

I/O

7
8
9

7
8
9

I/O signals
OSPI_CS0_b Output 10 10 Chip select 0, active-Low
OSPI_CS1_b Output 11 11 Chip select 1, active-Low 1
OSPI_RST_b Output 12 12 PMC GPIO controller output used for reset 2
  1. When one device is connected, it can be connected to CS0_b or CS1_b.
  2. The OSPI boot process and the Xilinx software drivers use an output signal from the PMC GPIO Controller (bank 0, channel 12) to reset the flash device.