Interconnect Register Set Overview

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

The interconnect control and status registers are contained in the INT_CSR and INT_GPV register sets.

CSR Registers

These CSR interconnect register sets control the functionality of the iPort and ePorts.

GPV Registers

The GPV interconnect registers control the functionality of the QoS generator and the resilience fault controller.

  • PMC_INT_GPV
  • PMC_IOP_INT_GPV
  • PSM_INT_GPV
  • LPD_INT_GPV
  • LPD_IOP_INT_GPV
  • FPD_INT_GPV
  • CPM4_INT_GPV
  • XRAM_INT_GPV
Note: The GPV register set descriptions are currently not available.