Interrupts

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

The ClkMon generates two types of interrupts for each channel for a total of 16 status interrupt bits in the CLKMON_ISR register:

  • Out of range error [RANGEx_ERR]
  • Internal counter overflow [CNTRx_ERR]

The status register reflects the raw status state. It is masked by the CLKMON_IMR register. The mask register bits are set and cleared by the interrupt disable and enable registers, respectively.

Monitored Clock Out of Range Error

If the clock frequency exceeds or falls below the limits of the threshold register settings, then the monitor clock out of range interrupt is generated.

Internal Counter Overflow Error

An internal register counts the number of clocks detected during the base time period. This is compared against the threshold register settings.

If the internal counter overflows, the counter overflow error interrupt bit is set. When this occurs, the base time period needs to be reduced, which can be done by entering a smaller CLKMON0_BASE register value, or using the faster PMC_IRO_CLK as a base clock reference.