JTAG Boot Register Settings

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

During boot, the BootROM sets configuration registers that apply to each boot mode. For JTAG boot mode, the BootROM sets the registers to the initial values shown in the following table.

Table 1. JTAG Boot System Register Settings
Register Name Base Address Register Value Description
DST_CTRL2 0xF11D_0824 0x081B_FFF8 PMC DMA controller 1 destination setup
RST_SBI 0xF126_0324 0x0000_0000 SBI reset not asserted
SBI_MODE 0xF122_0000 0x0000_0002 Device configuration mode, JTAG pass through SBI (PDI loading)
SBI_CTRL 0xF122_0004 0x0000_0025 JTAG mode data transfer, SBI enabled
PMCPLL_CTRL 0xF126_0040 0x0002_4800 PMC PLL (PPLL) setup uses reset defaults (REF_CLK multiplied by 72 (FBDIV) and divided by 4 (CLKOUTDIV))