Linear Descriptor Use Case

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

In the linear descriptor use case mode, BDs are stored in a linear array. In Figure 1, the first block shows the linear descriptor mode. This can be considered as one 4K page. Each descriptor is 128 bits and the DMA channel can fetch 256 bits on every descriptor read. This allows the DMA to fetch two descriptors in a single AXI read and reduces the number of descriptor fetches.

  • Each descriptor is 128 bits wide
  • Each descriptor must be 128-bit aligned
  • The descriptor element type is always 0 (in linear descriptor mode).
Table 1. Buffer Descriptor Format in Linear Descriptor Mode
ADDR LSB [31:0] WORD0
RSVD [31:12] ADDR MSB [11:0] WORD1
RSVD [31:29] SIZE [29:0] WORD2
RSVD [31:5] CNTL [4:0] WORD3