The local memory maps for dual processor and lock-step are shown in the following figure.
Local Address Space at 0xF900_0000
The RPU Arm GIC PL390 interrupt controller occupies 12 KB of local address space starting at 0xF900_0000. This range is only accessible to the RPU via the private low-latency peripheral port (LLPP) interface. For register descriptions, see the RPU_GIC_PL390 register module.
The RPU exception vectors can be configured to be HIVEC (
0000) or LOVEC
Because the OCM is mapped at HIVEC, and for the RPU to be able to execute interrupt
handlers directly from TCMs, the TCMs must be mapped starting at address
Also, to configure the APU with LOVEC in DRAM, the APU cannot access TCMs at LOVEC.
Consequently, TCMs are aliased into a local address map of the RPU for the Cortex-R5F processor to access them starting at address