The interconnect has several features that protect the system destinations from erroneous application software and misbehaving hardware interfaces. Erroneous software includes malicious and unintentional code that corrupts system memory or causes system failures. Misbehaving hardware includes incorrect device configuration, malicious functionality in the PL, or an unintentional design.
Each processor and DMA unit is assigned one or more system management IDs (SMID). The host specifies a read/write access type and address for each transaction. In addition, the Arm TrustZone technology tags the security level of each AXI transaction. The access type, address, and security level are checked by protection mechanisms before reaching the destination to determine if the transaction has the authority to access the requested memory (this includes memory locations and memory-mapped registers).