Memory Summary

Versal Adaptive SoC Technical Reference Manual (AM011)

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1.6 English

There are many types of memories and various instances. The following table provides links to these memories.

Table 1. Memory Summary
Name Description Link
DDR memory controller Multiple integrated DDR memory controller (DDRMC) supports both 32-bit and 64-bit data interfaces with ECC. DRAM System Memory Controller
HBM memory interface Multiple, wide data paths with ECC. High-Bandwidth Memory Interface
Integrated processor memory PPU RAM.


TCMs in RPU.

Integrated Processor Memory
Flash memory controllers QSPI, OSPI, SD, and eMMC controllers include boot options. Flash Memory Controllers section
OCM RPU-centric OCM in LPD on OCM interconnect. On-Chip Memory chapter
Accelerator memory, XRAM Accelerator memory is accessible by one port on the LPD interconnect and three ports in the PL. This is a device option. Accelerator RAM chapter
BBRAM Battery-backed RAM. Battery-Backed RAM
PL-based RAM arrays Block RAM and UltraRAM. PL-based RAM
Storage registers Global and persistent 32-bit registers in PMC and PSM. Storage Registers