The USB miscellaneous configuration, control, and user registers are summarized in the following table.
Register Name | Offset Address | Access Type | Description |
---|---|---|---|
|
RW | Bus configuration | |
GCTL |
|
RW | Common control |
GSTS |
0x0_C118
|
R | Status |
GUCTL1 GUCTL2 |
|
RW | User controls |
GSNPSID |
0x0_C120
|
Read only | ID register |
GGPIO |
0x0_C124
|
Mixed | General purpose I/O |
GUID |
0x0_C128
|
Read/Write | User ID |
GUCTL |
0x0_C12C
|
Read/Write | Global user control |
GBUSERRADDRLO GBUSERRADDRHI |
|
R | Bus address error |
|
R | Implementation parameters | |
GDBGFIFOSPACE |
0x0_C160
|
RW, R | Queue/FIFO space available |
ULPI PHY | |||
GUSB2PHYCFG |
0x0_C200
|
Mixed | ULPI PHY configuration |
GUSB2PHYACC_ULPI |
0x0_C280
|
RW, R | ULPI PHY vendor control |
RX/TX FIFO Depths | |||
|
RW | RXFIFO 0, 1, 2 depths | |
|
RW | TXFIFO 0, 1, 2 depths | |
Event | |||
|
RW | ||
|
RW | ||
|
RW | ||
|
RW | ||
Host Controls | |||
GHWPARAMS8 |
0x0_C600
|
R | Implementation parameters |
GTXFIFOPRIDEV |
0x0_C610
|
RW | Device TXFIFO DMA priority |
GTXFIFOPRIHST |
0x0_C618
|
RW | Host TXFIFO DMA priority |
GRXFIFOPRIHST |
0x0_C61C
|
RW | Host RXFIFO DMA priority |
GDMAHLRATIO |
0x0_C624
|
RW | Host FIFO DMA high-low priority ratio |
GFLADJ |
0x0_C630
|
RW | Frame length adjustment |