NPI Register Modules

Versal ACAP Technical Reference Manual (AM011)

Document ID
Release Date
1.4 English

The NPI programming registers are accessed by the NPI host controller located in the PMC.

The NPI registers are addressable in the 32-MB memory space starting at base address 0xF600_0000.

Access to the NPI host controller is protected by the NPI_XPPU protection unit in the PMC main switch. Burst accesses are supported to this address space.

Note: The NPI host controller is located in the PMC.

The NPI-based registers are separate from the APB-based PMC and PS registers. The NPI registers are listed in the following table.

Table 1. NPI Register Modules
Interface Size (KB) Base Address Notes
NoC_NMU_0 8192 0xF601_0000  
NoC_NMU_1 8192 0xF601_2000  
NoC_NMU_2 8192 0xF601_4000  
NoC_NMU_3 8192 0xF601_6000  
Reserved 32768 0xF601_8000  
NoC_NSU_0 8192 0xF602_1000  
NoC_NSU_1 8192 0xF602_2000  
Reserved 49152 0xF602_3000  
Reserved   0xF602_4000  
NoC_NSU_2 8192 0xF60D_0000  
NoC_NSU_3 8192 0xF60D_2000  
Reserved 49152 0xF60D_4000  
NoC_NMU_4 8192 0xF60E_0000  
NoC_NMU_5 8192 0xF60E_2000  
NoC_NSU_4 8192 0xF60E_4000  
NoC_NSU_5 8192 0xF60E_6000  
Reserved 32768 0xF60E_8000  
NoC_NMU_6 8192 0xF60F_0000  
NoC_NMU_7 8192 0xF60F_2000  
NoC_NMU_8 8192 0xF60F_4000  
NoC_NMU_9 8192 0xF60F_6000  
Reserved 32768 0xF60F_8000