Octal SPI Signals

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

In OSPI boot mode, MIO[0:5, 7:12] are configured by the BootROM to use:

  • Default drive strength (8 mA)
  • Default slew rate (slow)
  • Default weak pull-ups (enabled)
  • Enables the Schmitt trigger
  • Disables the 3-state override

The remaining MIOs are not set by the BootROM and remain at their default state. If a secure lockdown occurs during boot, the BootROM sets the PMC_GLOBAL TRISTATE_OVERRIDE register to force all I/Os into a tristate mode. This register is then reserved for use by the PLM firmware.

The following table lists the bidirectional PMC multiplexed I/Os (MIOs) and their functions used in the OSPI boot mode setup.

Table 1. Octal SPI Boot Mode Signals
PMC_MIO Pin Signal Name Description
0 OSPI_CLK OSPI clock output for OSPI0 in single setup, or OSPI clock output for OSPI0 and OSPI1 in dual-stacked setup.
1 OSPI_IO[0] Data pin used for OSPI single or dual-stacked boot mode setup
2 OSPI_IO[1] Data pin used for OSPI single or dual-stacked boot mode setup
3 OSPI_IO[2] Data pin used for OSPI single or dual-stacked boot mode setup
4 OSPI_IO[3] Data pin used for OSPI single or dual-stacked boot mode setup
5 OSPI_IO[4] Data pin used for OSPI single or dual-stacked boot mode setup
7 OSPI_IO[5] Data pin used for OSPI single or dual-stacked boot mode setup
8 OSPI_IO[6] Data pin used for OSPI single or dual-stacked boot mode setup
9 OSPI_IO[7] Data pin used for OSPI single or dual-stacked boot mode setup
10 OSPI0_CS_b Active-Low select output enables OSPI0 (lower) flash device
11 OSPI1_CS_b Active-Low select output enables OSPI1 (upper) flash device, used in dual-stacked setup
6 OSPI_DS Data strobe input, supports the DDR option in octal SPI boot mode. The octal SPI compatible flash must support SDR at power on. During the RCU boot phase initial checks SDR is required, then the PPU can switch the flash to DDR mode for faster boot time.
12 OSPI_RST_b Active-Low reset output to reset the OSPI flash.

The OSPI_RST_b signal must be connected to the OSPI flash. The PMC_GPIO channel is assigned to the OSPI flash reset pin MIO[12]. When the PMC RCU detects the octal SPI boot mode, it asserts and then deasserts the MIO[12] pin to reset the flash to a default state during boot.