Output Interface

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

The TPIU can be via the PMC MIO pins or the EMIO interface to the PL.

PMC MIO Data Interface

The maximum width of the trace data on MIO is 16 bits. The data is clocked out by a clock output from TPIU with a double data rate (DDR).

EMIO Data Interface

The maximum width of the trace data on EMIO is 32 bits. The data is clocked out by a clock input from the PL with a single data rate (SDR).

Frequency

The maximum clock frequency for the MIO and EMIO interfaces is speed grade dependent. See the PS Trace Interface section of the Versal Prime Series Data Sheet: DC and AC Switching Characteristics (DS956) and the Versal AI Core Series Data Sheet: DC and AC Switching Characteristics (DS957).