The transactions to and from the CPM are summarized in the following table for the PCIe® endpoint mode. The direction of the transaction is reflected in the route name: source_destination. The PS designation includes everything that is not the CPM (e.g, NoC/DDR).
Note: The root names
that include an asterisk (*) include restrictions and/or programming notes.
Route Name | Source | Via | Destination | Notes |
---|---|---|---|---|
From CPM To PS | ||||
EP_IN 1 | CPM_NOC0 |
CPM_PS switch, and |
DDR memory or PL | Physical address |
EP_IN 2 | CPM_NOC0 |
CPM_PS switch, |
OCM memory | |
EP_IN 3 | CPM_NOC0 |
CPM_PS switch, |
FPD_AXI_PL interface | |
EP_IN 4 | CPM_NOC1 | NoC Interconnect | DDR memory or PL | Physical address |
EP_IN 5 | CPM_NOC0 | CPM_PS switch | Debug Packet Controller | |
From PS To CPM | ||||
EP_OUT 1 | APU |
CCI, |
CPM Interconnect | |
EP_OUT 2 | PL | NoC Interconnect | CPM Interconnect | |
EP_OUT 3 | PL_AXI_FPD interface |
SMMU TBU 5, |
CPM Interconnect | |
EP_OUT 4 | PL_AXILITE_FPD |
SMMU TBU 2 |
CPM Interconnect | |
EP_OUT 5 | Debug Packet Controller | PS_CPM switch | CPM Interconnect |