PMC Local Registers

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The PMC PLM firmware controls the system resets, power, isolation, wake-up, and others. These software environments work together to manage the platform. The PLM firmware accepts platform requests and uses the local control and status registers to mange these requests.

The PMC local registers are only accessible by the PLM firmware.

PMC Local Control and Status Registers

The following table lists the PMC local control and status registers.

Table 1. PMC Local Control and Status Registers
Register Name Offset Address Access Type Description
Miscellaneous
BH_IMG_ATTR 0x0024 RW Boot header image attributes
SYS_INTERRUPT 0x0028 W System interrupt trigger for tamper, PUF

BBRAM_KEY_LOCK
EFUSE_KEY_LOCK

0x0034
0x0038

RW Unlock path from key space
32-bit Storage Registers

PMC_LCL_STORAGE0
PMC_LCL_STORAGE1
PMC_LCL_STORAGE2
PMC_LCL_STORAGE3
PMC_LCL_STORAGE4

0x0050+ RW General 32-bit storage registers

PERS_PMC_LCL_STORAGE0
PERS_PMC_LCL_STORAGE1
PERS_PMC_LCL_STORAGE2
PERS_PMC_LCL_STORAGE3
PERS_PMC_LCL_STORAGE4

0x0064+ RW

General 32-bit storage registers
Reset only by a POR

Miscellaneous
PMC_BOOT_ERR 0x2000 RW RCU BootROM error indicator