PMC Reference Clocks

Versal ACAP Technical Reference Manual (AM011)
Document ID
AM011
Release Date
2022-12-16
Revision
1.5 English

The control registers are used to select an input from a PLL clock generator, or other source, and divide down its frequency. The PMC reference clocks are listed in the following tables. All control registers are in the CRP register set.

Table 1. PMC IOP Reference Clock Registers
Reference Clock Clocks CRP Control Register
Output Name Divider Input Options
PMC I2C controller PMC_I2C_REF_CLK PPLL_CLK, NPLL_CLK I2C_REF_CTRL
QSPI controller QSPI_REF_CLK QSPI_REF_CTRL
OSPI controller OSPI_REF_CLK OSPI_REF_CTRL
SD delay-lock loop SD_DLL_REF_CLK SDIO_DLL_REF_CTRL CRP.SD_DLL_REF_CTRL
SD_eMMC 0 controller SD0_REF_CLK SD0_REF_CTRL
SD_eMMC 1 controller SD1_REF_CLK SD1_REF_CTRL
USB 2.0 controller located in the LPD USB_SUSPEND_CLK PMC_IRO_CLK/4 USB_SUSPEND_CTRL
Table 2. PMC System Reference Clock Registers
Reference Clock Clocks Control Register
Output Name Divider Input Options
High-speed clock for the AI Engine and DDR memory controllers 1 HSM0_REF_CLK PPLL_CLK, NPLL_CLK HSM0_REF_CTRL
HSM1_REF_CLK HSM1_REF_CTRL
General purpose reference clock routed to the PL fabric PL0_REF_CLK PMC_PL0_REF_CTRL
PL1_REF_CLK PMC_PL1_REF_CTRL
PL2_REF_CLK PMC_PL2_REF_CTRL
PL3_REF_CLK PMC_PL3_REF_CTRL
Divided-down PPLL_CLK routed the clock controllers in the LPD and FPD power domains PPLL_TO_XPD_CLK PPLL_CLK PPLL_TO_XPD_CTRL
Divided-down NPLL_CLK routed the clock controllers in the LPD and FPD power domains NPLL_TO_XPD_CLK NPLL_CLK NPLL_TO_XPD_CTRL
  1. The design tools assign the HSM0_REF_CLK to the AI Engine and HSM1_REF_CLK to the DDR memory controllers.
Table 3. PMC Miscellaneous Reference Clock Control Registers
Description Clocks Control Register
Output Name Divider Input Options
APB programming interfaces PMC_LSBUS_CLK PPLL_CLK, NPLL_CLK PMC_LSBUS_REF_CTRL
NPI programming interfaces NPI_REF_CLK NPI_REF_CTRL
Configuration frames unit CFU_REF_CLK CFU_REF_CTRL
AXI interconnect timeout block AXI_TIMEOUT_CLK PMC_IRO_CLK/4 SWITCH_TIMEOUT_CTRL
eFUSE controller EFUSE_REF_CLK PMC_IRO_CLK/4, REF_CLK EFUSE_REF_CTRL
System Monitor (SYSMON) SYSMON_REF_CLK PMC_IRO_CLK/2, NPI_REF_CLK SYSMON_REF_CTRL