Power Pins

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The following table lists the power domains.

Table 1. Power Pins
Pin Name Power Supply Description
PS and PMC
VCC_PSFP PS full-power domain (FPD).
VCC_PSLP PS low-power domain (LPD).
VCC_PMC PMC power domain (PMC).
VCCAUX_PMC Auxiliary for the PMC RTC, BBRAM, PLLs.
VCCAUX_SMON Analog for the ADC and other analog circuits in the system monitor.
PS and PMC I/O
VCCO_500 PMC MIO bank 0 with dedicated analog signals DIO_A.
VCCO_501 PMC MIO bank 1.
VCCO_502 LPD MIO bank in PS.
VCCO_503 PMC dedicated I/O (DIO) bank.
VCCO_510

VCCO_520

VCCO_530

PMC DIO voltage bank options for SSI technology devices
PMC Battery and eFUSE Power
VCC_BATT Battery-backed power domain. When VCC_BATT is not used, connect to ground.
VCC_FUSE eFUSE programming. Ideally VCC_FUSE should only be powered up when eFUSE programming is being done. If not programming eFUSE in the field, VCC_FUSE should be connected to ground.
System and Programmable Logic
VCC_RAM Block RAM, UltraRAM, and PL clocking network.
VCC_SOC NoC, NPI, and DDRMC SoC system power domain (SPD).
VCCAUX Auxiliary circuits.
VCCINT Internal logic (programmable logic, integrated hardware).
PL I/O Interfaces
VCC_IO XPIO banks.
VCCO_[bank number] HDIO LVCMOS output drivers (per bank).
GTx_AVCC Gigabit transceiver, analog internal circuits.
GTx_AVCCAUX Gigabit transceiver, auxiliary analog transceivers.
GTx_AVTT Gigabit transceiver, analog transmit driver.
GTx_AVTTRCAL Gigabit transceiver, analog resistor calibration.